Memory controllers frequently are utilized in processing systems to control access to memory resources for devices seeking to store data to memory or access data from memory. In conventional systems, memory access requests are supplied to the memory controller as soon as the memory controller is available to accept memory access requests. The memory controller typically then buffers the memory access requests and processes the buffered memory access requests based on certain assigned priorities. However, due to the conventional technique of dispatching memory access requests to the memory controller as soon as the memory controller is capable of buffering or processing the next memory access request, certain higher-priority memory access requests may not be processed in the most efficient manner if they become available for selection after the memory controller first becomes capable of receiving the next memory access request. To illustrate, in the event that a higher-priority memory access request is received shortly after the dispatch of a lower-priority memory access request due to the availability of the memory controller to accept the next request, processing of the higher-priority memory access request may be delayed until the memory controller is again capable to accept the next memory access request.
Accordingly, an improved technique for processing memory access requests would be advantageous.